Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor

B. Abegaz; J. Kueber

doi:10.1109/EIT.2019.8833756

Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor

Loyola University of Chicago

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	2019 IEEE International Conference on Electro Information Technology, EIT 2019
Publisher	IEEE Computer Society
Pages	1-5
Number of pages	5
ISBN (Electronic)	9781728109275
DOIs	https://doi.org/10.1109/EIT.2019.8833756
State	Published - May 2019
Externally published	Yes
Event	2019 IEEE International Conference on Electro Information Technology, EIT 2019 - Brookings, United States Duration: May 20 2019 → May 22 2019

Publication series

Name	IEEE International Conference on Electro Information Technology
Volume	2019-May
ISSN (Print)	2154-0357
ISSN (Electronic)	2154-0373

Conference

Conference	2019 IEEE International Conference on Electro Information Technology, EIT 2019
Country/Territory	United States
City	Brookings
Period	5/20/19 → 5/22/19

ASJC Scopus Subject Areas

Computer Science Applications
Information Systems
Control and Systems Engineering
Electrical and Electronic Engineering

Keywords

Binary Search Tree
Control Algorithms
Multi-Core Processors
Multi-Threading
Voltage Regulators

Access to Document

10.1109/EIT.2019.8833756

Cite this

Abegaz, B., & Kueber, J. (2019). Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor. In 2019 IEEE International Conference on Electro Information Technology, EIT 2019 (pp. 1-5). Article 8833756 (IEEE International Conference on Electro Information Technology; Vol. 2019-May). IEEE Computer Society. https://doi.org/10.1109/EIT.2019.8833756

Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor. / Abegaz, B.; Kueber, J.
2019 IEEE International Conference on Electro Information Technology, EIT 2019. IEEE Computer Society, 2019. p. 1-5 8833756 (IEEE International Conference on Electro Information Technology; Vol. 2019-May).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abegaz, B & Kueber, J 2019, Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor. in 2019 IEEE International Conference on Electro Information Technology, EIT 2019., 8833756, IEEE International Conference on Electro Information Technology, vol. 2019-May, IEEE Computer Society, pp. 1-5, 2019 IEEE International Conference on Electro Information Technology, EIT 2019, Brookings, United States, 5/20/19. https://doi.org/10.1109/EIT.2019.8833756

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author = "B. Abegaz and J. Kueber",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Electro Information Technology, EIT 2019 ; Conference date: 20-05-2019 Through 22-05-2019",

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Voltage regulator thermal matrix based thread allocation optimization for a multi-core processor

Publication series

Conference

ASJC Scopus Subject Areas

Keywords

Access to Document

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Cite this