Abstract
This paper considers the optimal offset, feasible offset, and optimal placement problems for a more general form of single-layer VLSI channel routing than has usually been considered in the past. Most prior works require that every net has exactly one terminal on each side of the channel. As long as only one side of the channel contains multiple terminals of the same net, we provide linear-time solutions to all three problems. Such results are implausible if the placement of terminals is entirely unrestricted; in fact, the size of the output for the feasible offset problem may be Ω(n^2). The linear-time results also hold with a ragged boundary on the side of the channel with multiple connections to the same net.
Original language | American English |
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Journal | Computer Science: Faculty Publications and Other Works |
Volume | 32 |
Issue number | 4 |
DOIs | |
State | Published - Aug 1 1996 |
Keywords
- VLSI
- placement
- wire routing
- channel routing
- single-layer routing
- algorithms
Disciplines
- Computer Sciences
- Theory and Algorithms
- VLSI and Circuits, Embedded and Hardware Systems