Abstract
There are certain straightforward algorithms for laying out finite-state machines. This paper shows that these algorithm are optimal in the worst case for machines with fixed alphabets. That is, for any s and k , there is a deterministic finite-state machine with s states and k symbols such that any layout algorithm requires Ω(ks log s) area to lay out its realization. Similarly, any layout algorithm requires Ω(ks^2) area in the worst case for nondeterministic finite-state machines with s states and k symbols.
Original language | American English |
---|---|
Journal | Computer Science: Faculty Publications and Other Works |
Volume | 30 |
Issue number | 1 |
DOIs | |
State | Published - Jan 1 1989 |
Keywords
- Custom VLSI
- layout algorithms
- regular languages
- finite-state machines
- lower bounds
- silicon compilers
Disciplines
- Computer Sciences
- Theory and Algorithms
- VLSI and Circuits, Embedded and Hardware Systems