An adaptable CMOS depressing synapse with detection of changes in input spike rate

Yilda Irizarry-Valle; Alice C. Parker; Norberto M. Grzywacz

doi:10.1109/LASCAS.2014.6820322

An adaptable CMOS depressing synapse with detection of changes in input spike rate

Yilda Irizarry-Valle, Alice C. Parker, Norberto M. Grzywacz

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	English
Title of host publication	2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings
Publisher	IEEE Computer Society
ISBN (Print)	9781479925070
DOIs	https://doi.org/10.1109/LASCAS.2014.6820322
State	Published - 2014
Externally published	Yes
Event	2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Santiago, Chile Duration: Feb 25 2014 → Feb 28 2014

Publication series

Name	2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings

Conference

Conference	2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014
Country/Territory	Chile
City	Santiago
Period	2/25/14 → 2/28/14

ASJC Scopus Subject Areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/LASCAS.2014.6820322

Cite this

Irizarry-Valle, Y., Parker, A. C., & Grzywacz, N. M. (2014). An adaptable CMOS depressing synapse with detection of changes in input spike rate. In 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings Article 6820322 (2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings). IEEE Computer Society. https://doi.org/10.1109/LASCAS.2014.6820322

An adaptable CMOS depressing synapse with detection of changes in input spike rate. / Irizarry-Valle, Yilda; Parker, Alice C.; Grzywacz, Norberto M.
2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings. IEEE Computer Society, 2014. 6820322 (2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Irizarry-Valle, Y, Parker, AC & Grzywacz, NM 2014, An adaptable CMOS depressing synapse with detection of changes in input spike rate. in 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings., 6820322, 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings, IEEE Computer Society, 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014, Santiago, Chile, 2/25/14. https://doi.org/10.1109/LASCAS.2014.6820322

Irizarry-Valle Y, Parker AC, Grzywacz NM. An adaptable CMOS depressing synapse with detection of changes in input spike rate. In 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings. IEEE Computer Society. 2014. 6820322. (2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings). doi: 10.1109/LASCAS.2014.6820322

Irizarry-Valle, Yilda ; Parker, Alice C. ; Grzywacz, Norberto M. / An adaptable CMOS depressing synapse with detection of changes in input spike rate. 2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings. IEEE Computer Society, 2014. (2014 IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014 - Conference Proceedings).

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isbn = "9781479925070",

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An adaptable CMOS depressing synapse with detection of changes in input spike rate

Publication series

Conference

ASJC Scopus Subject Areas

Access to Document

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Cite this